The long persistent barriers to atom-defined fabrication in silicon have been overcome. In the last year or two A.I. enabled printing and editing of atomically-perfect ensembles has become routine. I will discuss atomic circuitry composed of individual silicon surface dangling bonds that has the potential to address the shortcomings of CMOS – high power density and limited speed – and to enable new devices concepts. I will show that paired atoms form a double well potential occupied by one electron that serves as an ideal bit. Such a bit can be biased to yield a preferred occupation of one side or the other of the double well, thereby spatially mapping binary 0 and 1 states. I’ll show “binary wires” and logic gates that enable ultra-low power, ultra-fast “Binary Atomic Silicon Logic” (Nature Electronics 1, 636 (2018)). Ensembles of such coupled multi-electron atomic structures enable a new atomic-scale embodiment of the Ising model Hamiltonian that provides unique simulation opportunities. Single electron and atom scale transport studies of these systems will be described.
Unlike most other approaches to atom patterning, ours is robust above cryogenic temperatures, indeed is perfectly stable to 200 C, and moreover is of electrical utility; our structures exist in the bulk band gap and are not “shorted-out” by the substrate. This new atomic silicon circuitry also mates with CMOS, enabling hybrid CMOS/Atom circuits, and thereby retaining the enormous investment in conventional fabrication technologies and providing potential market entry.